Manufacturer | Xilinx |
Mounting Type | Surface Mount |
Number of I/O | 448 |
Package / Case | 668-BBGA, FCBGA |
Product Status | Active |
Total RAM Bits | 1327104 |
Number of Gates | - |
Voltage - Supply | 1.14V ~ 1.26V |
Number of LABs/CLBs | 2688 |
Operating Temperature | -40°C ~ 100°C (TJ) |
Supplier Device Package | 668-FCBGA (27x27) |
Number of Logic Elements/Cells | 24192 |
Description
Combining Advanced Silicon Modular Block (ASMBL™) architecture with a wide variety of flexible features, the Virtex®-4 family from Xilinx greatly enhances programmable logic design capabilities, making it a powerful alternative to ASIC technology. Virtex-4 FPGAs comprise three platform families—LX, FX, and SX—offering multiple feature choices and combinations to address all complex applications. The wide array of Virtex-4 FPGA hard-IP core blocks includes the PowerPC® processors (with a new APU interface), tri-mode Ethernet MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock management circuitry, and source-synchronous interface blocks. The basic Virtex-4 FPGA building blocks are enhancements of those found in the popular Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X product families, so previous-generation designs are upward compatible. Virtex-4 devices are produced on a state-of-the-art 90 nm copper process using 300 mm (12-inch) wafer technology
Features
• Three Families — LX/SX/FX
- Virtex-4 LX: High-performance logic applications solution
- Virtex-4 SX: High-performance solution for digital signal processing (DSP) applications
- Virtex-4 FX: High-performance, full-featured solution for embedded platform applications
• Xesium™ Clock Technology
- Digital clock manager (DCM) blocks
- Additional phase-matched clock dividers (PMCD)
- Differential global clocks
• XtremeDSP™ Slice
- 18 x 18, two’s complement, signed Multiplier
- Optional pipeline stages
- Built-in Accumulator (48-bit) and Adder/Subtracter
• Smart RAM Memory Hierarchy
- Distributed RAM
- Dual-port 18-Kbit RAM blocks
· Optional pipeline stages
· Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals
- High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.
• SelectIO™ Technology
- 1.5V to 3.3V I/O operation
- Built-in ChipSync™ source-synchronous technology
- Digitally controlled impedance (DCI) active termination
- Fine grained I/O banking (configuration in one bank)
• Flexible Logic Resources
• Secure Chip AES Bitstream Encryption
• 90 nm Copper CMOS Process
• 1.2V Core Voltage
• Flip-Chip Packaging including Pb-Free Package Choices
• RocketIO™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit Transceiver (MGT) [FX only]
• IBM PowerPC RISC Processor Core [FX only]
- PowerPC 405 (PPC405) Core
- Auxiliary Processor Unit Interface (User Coprocessor)
• Multiple Tri-Mode Ethernet MACs [FX only]
Three Families — LX/SX/FX
Virtex-4 LX: High-performance logic applications solution
Virtex-4 SX: High-performance solution for digital signal processing (DSP) applications
Virtex-4 FX: High-performance, full-featured solution for embedded platform applications
Xesium Clock Technology
Digital clock manager (DCM) blocks
Additional phase-matched clock dividers (PMCD)
Differential global clocks
XtremeDSP Slice
18 x 18, two’s complement, signed Multiplier
Optional pipeline stages
Built-in Accumulator (48-bit) and Adder/Subtracter
Smart RAM Memory Hierarchy
Optional pipeline stages
Optional programmable FIFO logic automatically remaps RAM signals as FIFO signals
Distributed RAM
Dual-port 18-Kbit RAM blocks
High-speed memory interface supports DDR and DDR-2 SDRAM, QDR-II, and RLDRAM-II.
Xilinx is a leading provider of programmable logic devices and associated technologies. As a top producer of programmable FPGAs, SoCs, MPSoCs, and 3D ICs, Xilinx has expanded quickly. Software defined and hardware optimized applications are supported by Xilinx, advancing the fields of cloud computing, SDN/NFV, video/vision, industrial IoT, and 5G wireless.
One of Xilinx's key innovations is the development of the Xilinx Vivado Design Suite, a comprehensive software toolchain used for designing and programming their FPGAs and SoCs. This suite provides developers with the necessary tools to create, simulate, and implement their designs on Xilinx devices.
In October 2020, Xilinx was acquired by Advanced Micro Devices (AMD), a major player in the semiconductor industry. This acquisition has enabled AMD to enhance its product portfolio and expand its offerings into the rapidly growing FPGA market.