XC4013E-4PQ208C

XC4013E-4PQ208C FPGAs Overview

Description:

XC4000 Series devices are implemented with a regular, flexible, programmable architecture of Configurable Logic Blocks (CLBs), interconnected by a powerful hierarchy of versatile routing resources, and surrounded by a perimeter of programmable Input/Output Blocks (IOBs). They have generous routing resources to accommodate the most complex interconnect patterns. The devices are customized by loading configuration data into internal memory cells. The FPGA can either actively read its configuration data from an external serial or byte-parallel PROM (master modes), or the configuration data can be written into the FPGA from an external device (slave and peripheral modes). XC4000 Series FPGAs are supported by powerful and sophisticated software, covering every aspect of design from schematic or behavioral entry, floor planning, simulation, automatic block placement and routing of interconnects, to the creation, downloading, and readback of the configuration bit stream. Because Xilinx FPGAs can be reprogrammed an unlimited number of times, they can be used in innovative designs where hardware is changed dynamically, or where hardware must be adapted to different user applications. FPGAs are ideal for shortening design and development cycles, and also offer a cost-effective solution for production rates well beyond 5,000 systems per month. For lowest high-volume unit cost, a design can first be implemented in the XC4000E or XC4000X, then migrated to one of Xilinx’ compatible HardWire mask-programmed devices.

Features:

• Highest Performance — 3.3 V XC4000XL
• Highest Capacity — Over 180,000 Usable Gates
• 5 V tolerant I/Os on XC4000XL
• 0.35 mm SRAM process for XC4000XL
• Additional Routing Over XC4000E
  - almost twice the routing capacity for high-density
   designs
• Buffered Interconnect for Maximum Speed Blocks
• Improved VersaRingTM I/O Interconnect for Better Fixed
  Pinout Flexibility
• 12 mA Sink Current Per XC4000X Output
• Flexible New High-Speed Clock Network
- Eight additional Early Buffers for shorter clock delays
- Virtually unlimited number of clock signals
• Optional Multiplexer or 2-input Function Generator on
Device Outputs
• Four Additional Address Bits in Master Parallel
  Configuration Mode
• XC4000XV Family offers the highest density with
  0.25 mm 2.5 V technology
Introduction:
XC4000 Series high-performance, high-capacity Field Programmable Gate Arrays (FPGAs) provide the benefits of custom CMOS VLSI, while avoiding the initial cost, long development cycle, and inherent risk of a conventional masked gate array. The result of thirteen years of FPGA design experience and feedback from thousands of customers, these FPGAs combine architectural versatility, on-chip Select-RAM memory with edge-triggered and dual-port modes, increased speed, abundant routing resources, and new, sophisticated software to achieve fully automated implementation of complex, high-density, high-performance designs.

The Xilinx FPGAs series XC4013E-4PQ208C is FPGA XC4000E Family 13K Gates 1368 Cells 0.35um Technology 5V 208Pin PQFP, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com, and you can also search for other FPGAs products.

Features

Absolute Maximum Ratings

Description UnitsVCCSupply voltage relative to Ground-0.5 to 4.0VVINInput voltage relative to Ground (Note 1)-0.5 to 5.5VVTSVoltage applied to 3-state output (Note 1)-0.5 to 5.5VVCCtLongest Supply Voltage Rise Time from 1 V to 3V50msTSTGStorage temperature (ambient)-65 to +150°CTSOLMaximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)+260°CTJJunction TemperatureCeramic packages+150°CPlastic packages+125°C

Note 1: Maximum DC excursion above Vcc or below Ground must be limited to either 0.5 V or 10 mA, whichever is easier to achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot toVCC +2.0 V, provided this over or undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA.

Note: Stresses beyond thouse listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond thouse listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability

Recommended Operating Conditions

SymbolDescriptionMinMaxUnitsVCCSupply voltage relative to Gnd, TJ = 0 °C to +85°CCommercial3.03.6VSupply voltage relative to Gnd, TJ = -40°C to +100°CIndustrial3.03.6VVIHHigh-level input voltage50% of VCC5.5MaxVVILLow-level input voltage030% of VCCVTINInput signal transition time 250ns

Notes: At junction temperatures above thouse listed above, all delay parameters increase by 0.35% per °C. Input and output measurement threshold is ~50% of VCC.