Manufacturer | Xilinx |
Memory Size | 1MB |
Mounting Type | Surface Mount |
Package / Case | 20-LCC (J-Lead) |
Product Status | Obsolete |
Voltage - Supply | 3V ~ 3.6V |
Programmable Type | In System Programmable |
Operating Temperature | -40°C ~ 85°C |
Supplier Device Package | 20-PLCC (9x9) |
The Xilinx XC18V01PC20I provide an easy-touse, cost-effective method for reprogramming and storing Xilinx FPGA configuration bitstreams.
When theXC18V01PC20I FPGA is in Master SelectMAP mode, the FPGA generates a configuration clock that drives the PROM. When the FPGA is in Slave Parallel or Slave SelectMAP mode, an external oscillator generates the configuration clock that drives the PROM and the FPGA. After CE and OE are enabled, data is available on the PROM’s DATA (D0-D7) pins. New data is available a short access time after each rising clock edge. The data is clocked into the FPGA on the following rising edge of the CCLK. A free-running oscillator can be used in the Slave Parallel or Slave SelecMAP modes.
Multiple devices can be cascaded by using the CEO output to drive the CE input of the following device. The clock inputs and the DATA outputs of all PROMs in this chain are interconnected. All devices are compatible and can be cascaded with other members of the family or with the XC17V00 one-time programmable serial PROM family.
The Xilinx Memory - Configuration Proms for FPGA's series XC18V01PC20I is Sequential Access Serial EEPROM, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at bitfoic.com, and you can also search for other FPGAs products.In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAs
Endurance of 20,000 Program/Erase Cycles
Program/Erase Over Full Industrial Voltage and Temperature Range (–40°C to +85°C)
IEEE Std 1149.1 Boundary-Scan (JTAG) Support
JTAG Command Initiation of Standard FPGA Configuration
Simple Interface to the FPGA
Cascadable for Storing Longer or Multiple Bitstreams
Low-Power Advanced CMOS FLASH Process
Dual Configuration Modes
Serial Slow/Fast Configuration (up to 33 MHz)
Parallel (up to 264 Mb/s at 33 MHz)
5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals
3.3V or 2.5V Output Capability
Design Support Using the Xilinx ISE Foundation Software Packages
Available in PC20, SO20, PC44, and VQ44 Packages
Lead-Free (Pb-Free) Packaging
Xilinx is a leading provider of programmable logic devices and associated technologies. As a top producer of programmable FPGAs, SoCs, MPSoCs, and 3D ICs, Xilinx has expanded quickly. Software defined and hardware optimized applications are supported by Xilinx, advancing the fields of cloud computing, SDN/NFV, video/vision, industrial IoT, and 5G wireless.
One of Xilinx's key innovations is the development of the Xilinx Vivado Design Suite, a comprehensive software toolchain used for designing and programming their FPGAs and SoCs. This suite provides developers with the necessary tools to create, simulate, and implement their designs on Xilinx devices.
In October 2020, Xilinx was acquired by Advanced Micro Devices (AMD), a major player in the semiconductor industry. This acquisition has enabled AMD to enhance its product portfolio and expand its offerings into the rapidly growing FPGA market.