The ispLSI 2000E, 2000VE and 2000VL Families of high density devices address high performance system logic needs, implementing logic functions ranging from registers, to counters, to multiplexers, to complex state machines. With PLD densities ranging from 1,000 to 8,000 gates, the ispLSI 2000E, 2000VE and 2000VL Families provide a wide range of programmable logic solutions to meet tomorrow’s design requirements today. Each device contains multiple Generic Logic Blocks (GLBs) designed to maximize system flexibility and performance. A balanced ratio of registers and I/O cells provides the optimum combination of internal logic and external connections. A global interconnect scheme ties everything together, enabling utilization of up to 80% of available logic. Tables 1 and 2 describe the Family attributes.The 2000VE and 2000VL Families offer multiple I/O options for the ispLSI 2128VE,2128VL and ispLSI 2064VE and 2064VL devices. The ispLSI 2128VE, and 2128VL are available in both 128- and 64-I/O versions and the ispLSI 2064VE and 2064VL are available in both 64- and 32-I/O versions.

Feature

  ispLSI 2000E Family

❑ Industry’s Fastest 5V CPLD

❑ 225 MHz System Performance

❑ 3.5 ns Pin-to-Pin Delay

❑ 5V Programmable Logic Core

❑ ispJTAG In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port

❑ User-Selectable 3.3V or 5V I/O

❑ Programmable Open-Drain Outputs

❑ PCI Compatible Outputs

  ispLSI 2000VE Family

❑ Industry’s Fastest 3.3V CPLD

❑ 300 MHz System Performance

❑ 3.0 ns Pin-to-Pin Delay

❑ ispJTAG In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port

❑ Boundary Scan Test (IEEE 1149.1)

❑ Programmable Open-Drain Outputs

❑ 3.3V/5V Compatible I/O

  ispLSI 2000VL Family

❑ Industry’s Fastest 2.5V Family

❑ 180MHz System Performance

❑ 5.0ns Pin-to-Pin Delay

❑ ispJTAG In-System Programmable via IEEE 1149.1 (JTAG) Test Access Port

❑ Boundary Scan Test (IEEE 1149.1)

❑ Programmable Open-Drain Outputs

❑ 3.3V Compatible I/O

  ispLSI Development Tools

❑ ispLEVER Systems for PC and Lattice

UNIX-Based Design Tools

❑ Tightly Integrated with Leading CAE Vendors’ Tools

❑ Productivity Enhancing Static Timing Analyzer,

  Physical Viewer and Explore Tools

❑ VHDL, Verilog-HDL, ABEL, State Machine and

  Schematic Entry

❑ Timing and Functional Simulators

❑ Comprehensive ISP Programming Tools

❑ Windows XP, Windows 2000, Windows 98,

  Windows NT, Solaris and Hewlett-Packard

  UNIX Platforms